This invention generally relates to a process for improving the quality of semiconductor devices which employ a dielectric layer deposited on a silicon carbide substrate.
Metal-oxide-semiconductor (MOS) structures and more generally metal-insulator-semiconductor (MIS) structures are used in numerous semiconductor devices such as CMOS, MOSFET, MISFET, JFET, IGBT, and MCT. MIS devices in which silicon carbide (SiC) is the substrate are attractive for high power, high frequency, and high temperature applications. Typically a thermal oxide is thermally grown on a SiC substrate by oxidizing SiC at temperatures between 1050.degree. C. and 1300.degree. C. in a wet O.sub.2 furnace. The quality of the oxide layer generally improves with decreasing temperature but the time required to form the oxide layer is longer. For example, formation of a 50-nm thick oxide layer by thermal oxidation at 1050.degree. C. takes approximately 25 hours. Even at the lowest temperatures (1050.degree. C.), thermal oxide layers formed on p-type SiC substrates have historically yielded poor quality devices, with the best devices having oxide charge and interface trap densities on the order of 1.times.10.sup.12 cm.sup.-2 and 1-2.times.10.sup.11 cm.sup.-2 /eV respectively. Other deposition methods based on chemical vapor deposition (CVD) have also been tried, but have not specifically reduced the oxide charge density that are achievable by the thermal oxidation.
To approach acceptable MOS device levels, the oxide charge density in p-type MOS SiC based devices must be reduced, preferably with shorter oxide formation times.